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May 19, 2024
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ECGR 8186 - Design for Testability Fault modeling; test generation using the D-algorithm, PODEM, and FAN; partitioning; scan design, built-in self-testing; testing of array logic; and fault tolerance. Project-oriented course involving the use of logic and fault simulation tools.
Credit Hours: (3) Restriction(s): Credit will not be given for ECGR 8186 where credit has been given for ECGR 6186. Prerequisite(s): ECGR 2181 or permission of department. Cross-listed Course(s): ECGR 6186
Schedule of Classes
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